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Shift registers


Shift registries are a type of consecutive logic circuit, chiefly for storage of digital informations. They are a group of somersault -flops connected in a concatenation so that the end product from one reversal becomes the input of the following reversal. Most of the registries possess no characteristic internal sequence of provinces. All impudent -flop is driven by a common clock, and all are set or reset at the same time.

In these few talks, the basic types of displacement registries are studied, such as Serial In – Consecutive Out, Serial In – Analogue Out, Parallel In – Consecutive Out, Parallel In – Analogue Out, and bidirectional displacement registries. A particular signifier of counter – the displacement registry counter, is besides introduced.


  • A set of n reversals
  • ? ?

  • Each flip-flop shops one spot
  • Two basic maps: informations storage ( Figure 1.2 ) and informations motion ( Figure 1.1 ) .

Shift Register:

  • A registry that allows each of the somersault -flops to go through the stored information to its next neighbor
  • Figure 1.1 shows the basic informations motion in displacement registries.


  • A registry that goes through a preset sequence of provinces

Storage Capacity:

The storage capacity of a registry is the entire figure of spots ( 1 or 0 ) of digital informations it can retain. Each phase ( impudent floating-point operation ) in a displacement registry represents one spot of storage capacity. Therefore the figure of phases in a registry determines its storage capacity.

Consecutive In – Consecutive Out Shift Registers

The consecutive in/serial out displacement registry accepts data serially – that is, one spot at a clip on a individual line. It produces the stored information on its end product besides in consecutive signifier.

A basic four-bit displacement registry can be constructed utilizing four D somersault -flops, as shown in Figure 2.1.

The operation of the circuit is as follows.

  • The registry is foremost cleared, coercing all four end products to zero.
  • The input informations is so applied consecutive to the D input of the first reversal on the left ( FF0 ) .
  • During each clock pulsation, one spot is transmitted from left to compensate. ? ? Assume a information word to be 1001.
  • The least important spot of the information has to be shifted through the registry from FF0 to FF3.

In order to acquire the informations out of the registry, they must be shifted out serially. This can be done destructively or non-destructively. For destructive read-out, the original information is lost and at the terminal of the read rhythm, all impudent -flops are reset to zero.

Consecutive In – Analogue Out Shift Registers

For this sort of registry, informations spots are entered serially in the same mode as Dis cussed in the last subdivision. The difference is the manner in which the information spots are taken out of the registry. Once the informations are stored, each spot appears on its several end product line, and all spots are available at the same time. A building of a four-bit series in – analogue out registry is shown below.

Parallel In – Consecutive Out Shift Registers

A four-bit analogue in – series out displacement registry is shown below. The circuit uses D somersault -flops and NAND Gatess for come ining informations ( ie composing ) to the registry.

D0, D1, D2 and D3 are the parallel inputs, where D0 is the most important spot and D3 is the least important spot. To compose informations in, the manner control line is taken to LOW and the information is clocked in. The informations can be shifted when the manner control line is HIGH as SHIFT is active high. The registry performs right displacement operation on the application of a clock pulsation, as shown in the tabular array below.

The 74HC 165 is an illustration of an IC displacement registry that has a parallel in/serial out operation. It can besides be operated as consecutive in/serial out. Figure 4.1 shows the logic diagram and logic symbol of 74HC 165.

Parallel In – Analogue Out Shift Registers

For analogue in – analogue out displacement registries, all informations spots appear on the parallel end products instantly following the coincident entry of the information spots. The undermentioned circuit is a four-bit analogue in – analogue out shift registry constructed by D reversals.

The D ‘s are the parallel inputs and the Q ‘s are the parallel end products. Once the registry is clocked, all the information at the D inputs appear at the corresponding Q outputs at the same time.

4-bit Parallel-Access Shift Register ( 74HC195 )

The 74HC 195 can be used for parallel in/parallel out operation, consecutive in/serial out and consecutive in/parallel out operations. Q3 is the end product when it is used for parallel in/serial out operation.

Bidirectional Shift Registers

The registries discussed so far involved merely right displacement operations. Each right displacement operation has the consequence of in turn spliting the binary figure by two. If the operation is reversed ( left displacement ) , this has the consequence of multiplying the figure by two. With suited gating agreement a consecutive displacement registry can execute both operations.

A bidirectional, or reversible, shift registry is one in which the informations can be shift either left or right. A four-bit bidirectional displacement registry utilizing D reversal is shown below.

Here a set of NAND Gatess are configured as OR gates to choose informations inputs from the right or left next bistables, as selected by the LEFT/RIGHT control line.

4-Bit Bidirectional Universal Shift Registers ( 74HC194 )

The 74HC 194 is a cosmopolitan bi-directional displacement registry. It has both consecutive and parallel input and end product capableness.

Shift Register Counters

Two of the most common types of displacement registry counters are introduced here: the Ring counter and the Johnson counter. They are fundamentally shift registries with the consecutive end products connected back to the consecutive inputs in order to bring forth peculiar sequences. These registries are classified as counters because they exhibit a specified sequence of provinces.

Ringing Counters

A ring counter is fundamentally a go arounding displacement registry in which the end product of the most important phase is fed back to the input of the least important phase. The followers is a 4-bit ring counter constructed from D reversals. The end product of each phase is shifted into the following phase on the positive border of a clock pulsation. If the CLEAR signal is high, all the impudent – floating-point operations except the first one FF0 are reset to 0. FF0 is preset to 1 alternatively.

Since the count sequence has 4 distinguishable provinces, the counter can be considered as a mod-4 counter. Merely 4 of the maximal 16 provinces are used, doing pealing counters really inefficient in footings of province use. But the major advantage of a ring counter over a binary counter is that it is self-decoding. No excess decryption circuit is needed to find what province the counter is in.

Johnson Counters

Johnson counters are a fluctuation of standard ring counters, with the upside-down end product of the last phase fed back to the input of the first phase. They are besides known as distorted ring counters. An n-stage Johnson counter outputs a count sequence of length 2n, so it may be considered to be a mod-2n counter. The circuit below shows a 4-bit Johnson counter. The province sequence for the counter is given in the tabular array.

  • Again, the evident disadvantage of this counter is that the maximal available provinces are non to the full utilized. Merely eight of the 16 provinces are being used.
  • Beware that for both the Ring and the Johnson counter must ab initio be forced into a valid province in the count sequence because they operate on a subset of the available figure of provinces. Otherwise, the ideal sequence will non be followed.


Shift registries can be found in many applications. Here is a list of a few. ? ? To bring forth clip hold

The series in -serial out displacement registry can be used as a clip hold device. The sum of hold can be controlled by:

  1. the figure of phases in the registry
  2. the clock frequence

The ring counter technique can be efficaciously utilised to implement synchronal consecutive circuits. A major job in the realisation of consecutive circuits is the assignment of binary codifications to the internal provinces of the circuit in order to cut down the complexness of circuits required. By delegating one somersault -flop to one internal province, it is possible to simplify the combinable logic required to recognize the complete consecutive circuit. When the circuit is in a peculiar province, the somersault -flop matching to that province is set to HIGH and all other somersault -flops remain Low.

To change over consecutive informations to parallel informations

A computing machine or microprocessor-based system commonly requires incoming informations to be in parallel format. But often, these systems must pass on with external devices that send or receive consecutive informations. So, serial-to-parallel transition is required. As shown in the old subdivisions, a series in – analogue out registry can accomplish this.